1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for performing a cascading processing of semiconductor wafers.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today""s manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer composed of a variety of materials may be formed above a wafer. Thereafter, a patterned layer of photoresist may be formed above the process layer using known photolithography techniques. Typically, an etch process is then performed on the process layer using the patterned layer of photoresist as a mask. This etching process results in formation of various features or objects in the process layer. Such features may be used for a gate electrode structure for transistors. Many times, trench structures are also formed on the substrate of the semiconductor wafer. One example of a trench structure is a shallow trench isolation (STI) structure, which can be used to isolate electrical areas on a semiconductor wafer. Typically, STI structures formed on the semiconductor wafers are filled by forming silicon dioxide using tetraethoxysilane (TEOS), over the wafer and in the STI structures.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1 illustrates a typical semiconductor wafer 105. The wafer 105 typically includes a plurality of individual semiconductor die 103 arranged in a grid 150. Photolithography steps are typically performed by a stepper on approximately one to four die locations at a time, depending on the specific photomask employed. Photolithography steps are generally performed to form patterned layers of photoresist above one or more process layers that are to be patterned. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features, such as a polysilicon line, or opening-type features, that are to be replicated in an underlying process layer.
Conventional procedures during manufacturing of semiconductor wafers call for a set of steps that are performed in series. Turning now to FIG. 2, a flowchart depiction of such steps are illustrated. The manufacturing system acquires semiconductor wafers 105 that are to be processed (block 210). Once a set of wafers 105 to be processed is acquired, the manufacturing system acquires pre-processing manufacturing data (e.g., metrology data and the like) from the semiconductor wafers 105 (block 220).
For certain processes, the manufacturing data acquired from the wafer 105 may involve a pre-process screening of the semiconductor wafers 105. For example, before performing a chemical-mechanical polishing (CMP) process, pre-processing data acquired from the semiconductor wafers 105 that are about to processed, can be used to set control parameters that affect the CMP process. Once pre-processing data is acquired, the manufacturing system processes the semiconductor wafers 105 (block 230).
After processing the semiconductor wafers 105, the manufacturing system determines whether additional processes are to be performed on the semiconductor wafers 105 (block 240). When the manufacturing system determines that additional processes are to be performed on the semiconductor wafers 105, pre-process metrology data may be acquired and additional processes are performed on the semiconductor wafers 105 (see flowchart path: block 230xe2x80x94block 240xe2x80x94block 220). The manufacturing system may use a plurality of processing tools to perform a plurality of processing on the semiconductor wafers 105.
When the manufacturing system determines that additional processes are not to be performed on the semiconductor wafers 105, the manufacturing system may acquire post-process manufacturing data from the processed wafers 105 (block 250). Generally, the post-process manufacturing data includes measurements of a plurality of structures formed on the semiconductor wafers 105. If there are other semiconductor wafers 105 to be processed, as determined in block 260, the manufacturing system acquires the next wafer 105 to be processed and repeats the processes described above (blocks 250, 270). Alternatively, if there are no additional semiconductor wafers 105 to be processed, the manufacturing system stops the processing mode (block 270).
The steps illustrated by FIG. 2 are generally performed in series, causing the manufacturing system to execute frequent breaks in the process flow. Acquiring pre-process data using a metrology tool, then processing the wafer 105, then acquiring post-process manufacturing data, can be an inefficient process when performed in series. Any interruption in a process flow of semiconductor wafers can cause inefficiencies and errors. Manufacturing time lost due to such inefficiencies can be very costly, and can adversely affect product delivery schedules. Errors in the semiconductor wafers 105 can adversely affect the yields of the devices produced from the processed semiconductor wafers 105.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided for performing cascade control of processing of semiconductor wafers. A method and an apparatus for performing cascade control of processing of semiconductor wafers. A first semiconductor wafer for processing is received. A second semiconductor wafer for processing is received. A cascade processing operation upon the first and the second semiconductor wafers is performed, wherein the cascade processing operation comprises acquiring pre-process metrology data related to the second semiconductor wafer during at least a portion of a time period wherein the first semiconductor wafer is being processed.
In another aspect of the present invention, a system is provided for performing cascade control of processing of semiconductor wafers. The system of the present invention comprises: a process controller to perform a cascade process operation, the cascade process operation comprising: acquiring pre-process data related to a first semiconductor wafer; processing the first semiconductor wafer after the acquiring of the pre-process data relating to the first semiconductor wafer; acquiring pre-process data related to a second semiconductor wafer during at least a portion of a time period wherein the first semiconductor wafer being processed; processing the second semiconductor wafer after the acquiring of the pre-process data related to the second semiconductor wafer acquiring post-process data related to the first semiconductor wafer during at least a portion of a time period wherein the second semiconductor wafer is being processed; and acquiring post-process data related to the second semiconductor wafer after the processing of the second semiconductor wafer. The system also comprises: an inline cascade metrology data storage unit operatively coupled to the process controller, the inline cascade metrology data storage unit to receive at least one of an inline pre-process metrology data and an inline post-process metrology data; and a feedback/feed-forward unit operatively coupled to the process controller and the inline cascade metrology data storage unit, the feedback/feed-forward unit to perform a feedback function in response to at least one of the inline pre-process metrology data and the inline post-process metrology data.